Horizontal gate all around and FinFET device isolation
US10490666B2 · kind B2 · utility
1Cited by
12References
17Claims
0Family size
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Key dates
| Filing date | Nov 6, 2017 |
| Grant date | Nov 26, 2019 |
| Priority date | — |
| Expiry date | Nov 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.