CMOS compatible non-filamentary resistive memory stack

US10505112B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Takashi Ando · Tuckahoe, US
• Eduard A. Cartier · New York, US
• Adam M. Pyzyna · Somers, US
• John Bruley · Poughkeepsie, US

Key dates

• Filing date: Jun 26, 2018
• Grant date: Dec 10, 2019
• Expiry date: Jun 26, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/063

Abstract

CMOS-compatible non-filamentary RRAM devices and techniques for formation thereof are provided. In one aspect, a method of forming a non-filamentary RRAM device includes: depositing a base oxide layer (e.g., hafnium oxide) on a bottom electrode; depositing a cap layer (e.g., amorphous silicon) on the base oxide layer; and depositing a top electrode on the cap layer, wherein the cap layer and the top electrode are deposited in-situ without any air exposure in between such that there is an absence of oxide at an interface between the cap layer and the top electrode. A low resistivity layer can optionally be deposited on the top electrode. An RRAM device and a computing device having a crossbar array of the present RRAM cells are also provided.