Inventor · New York, NY, US

Eduard A. Cartier

101Patents
16h-index
139Co-inventors
89Inventor score

Filing activity: Feb 16, 1999 → Feb 3, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US6444592B1 Interfacial oxidation process for high-k gate dielectric process integration Electricity 137 Expired
US6541079B1 Engineered high dielectric constant oxide and oxynitride heterostructure gate dielectrics by an atomic beam deposition technique Chemistry; Metallurgy 95 Expired
US7488656B2 Removal of charged defects from metal oxide-gate stacks Electricity 73 Expired
US7105889B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Electricity 61 Expired
US7652332B2 Extremely-thin silicon-on-insulator transistor with raised source/drain Electricity 40 Active
US7242055B2 Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide Electricity 38 Expired
US7741188B2 Deep trench (DT) metal-insulator-metal (MIM) capacitor Emerging Cross-Sectional Technologies 28 Active
US6528374B2 Method for forming dielectric stack without interfacial layer Electricity 27 Expired
US7183604B2 High dielectric constant device Emerging Cross-Sectional Technologies 27 Expired
US7696036B2 CMOS transistors with differential oxygen content high-k dielectrics Electricity 26 Active
US7479683B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Electricity 25 Expired
US6511873B2 High-dielectric constant insulators for FEOL capacitors Electricity 22 Expired
US7871869B2 Extremely-thin silicon-on-insulator transistor with raised source/drain Electricity 21 Active
US6413386B1 Reactive sputtering method for forming metal-silicon layer Chemistry; Metallurgy 18 Expired
US7655994B2 Low threshold voltage semiconductor device with dual threshold voltage control means Electricity 17 Expired
US6521977B1 Deuterium reservoirs and ingress paths Electricity 16 Expired
US7807525B2 Low power circuit structure with metal gate and high-k dielectric Electricity 14 Active
US7452767B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Electricity 14 Active
US7560361B2 Method of forming gate stack for semiconductor electronic device Electricity 14 Expired
US8193051B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Electricity 13 Active
US6831339B2 Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same Electricity 13 Expired
US7598545B2 Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices Electricity 13 Active
US7928514B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Electricity 11 Active
US8035173B2 CMOS transistors with differential oxygen content high-K dielectrics Electricity 10 Active
US7745278B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics Electricity 10 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.