Inventor · Poughkeepsie, NY, US

John Bruley

20Patents
5h-index
49Co-inventors
65Inventor score

Filing activity: Aug 29, 2003 → Jul 13, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7247946B2 On-chip Cu interconnection using 1 to 5 nm thick metal cap Electricity 28 Expired
US6878624B1 Pre-anneal of CoSi, to prevent formation of amorphous layer between Ti-O-N and CoSi Electricity 19 Expired
US8741713B2 Reliable physical unclonable function for device authentication Electricity 18 Active
US9324843B2 High germanium content silicon germanium fins Electricity 7 Active
US6884641B2 Site-specific methodology for localization and analyzing junction defects in mosfet devices Emerging Cross-Sectional Technologies 5 Expired
US6875982B2 Electron microscope magnification standard providing precise calibration in the magnification range 5000X-2000,000X Electricity 5 Expired
US7015469B2 Electron holography method Electricity 5 Expired
US10269714B2 Low resistance contacts including intermetallic alloy of nickel, platinum, titanium, aluminum and type IV semiconductor elements Electricity 4 Active
US9812530B2 High germanium content silicon germanium fins Electricity 4 Active
US10985105B2 Low resistance contacts including intermetallic alloy of nickel, platinum, titanium, aluminum and type IV semiconductor elements Electricity 2 Active
US11101219B2 Low resistance contacts including intermetallic alloy of nickel, platinum, titanium, aluminum and type IV semiconductor elements Electricity 2 Active
US9551674B1 Method of producing an un-distorted dark field strain map at high spatial resolution through dark field electron holography Physics 1 Active
US11862567B2 Low resistance contacts including intermetallic alloy of nickel, platinum, titanium, aluminum and type IV semiconductor elements Electricity 0 Active
US12062614B2 Low resistance contacts including intermetallic alloy of nickel, platinum, titanium, aluminum and type IV semiconductor elements Electricity 0 Active
US11765985B2 Spurious junction prevention via in-situ ion milling Electricity 0 Active
US10505112B1 CMOS compatible non-filamentary resistive memory stack Electricity 0 Active
US11152214B2 Structures and methods for equivalent oxide thickness scaling on silicon germanium channel or III-V channel of semiconductor device Electricity 0 Active
US12048254B2 Sacrificial material facilitating protection of a substrate in a qubit device Electricity 0 Active
US11552237B2 Grain size control of superconducting materials in thin films for Josephson junctions Electricity 0 Active
US10529832B2 Shallow, abrupt and highly activated tin extension implant junction Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.