Substrate support with multiple embedded electrodes
US10510575B2 · kind B2 · utility
50Cited by
79References
17Claims
0Family size
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Key dates
| Filing date | Sep 20, 2017 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Sep 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for biasing regions of a substrate in a plasma assisted processing chamber are provided. Biasing of the substrate, or regions thereof, increases the potential difference between the substrate and a plasma formed in the processing chamber thereby accelerating ions from the plasma towards the active surfaces of the substrate regions. A plurality of bias electrodes herein are spatially arranged across the substrate support in a pattern that is advantageous for managing uniformity of processing results across the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.