Substrate structure with spatial arrangement configured for coupling of surface plasmons to incident light
US10510675B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2018 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Mar 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54426
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.