Semiconductor package
US10510737B2 · kind B2 · utility
1Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2017 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Oct 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.