MRAM chip magnetic shielding
US10510946B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2016 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Dec 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetic random access memory (MRAM) chip magnetic shielding and methods of forming a magnetic shield processed at the wafer-level are disclosed. The method includes providing a magnetic shield at the front side of the chip, back side of the chip, and also in the deep trenches surrounding or adjacent to magnetic tunnel junction (MTJ) array within the prime die region. Magnetic shield in the deep trenches connects front side and back side magnetic shield. This magnetic shielding method is applicable for both in-plane and perpendicular MRAM chips. The MTJ array is formed in the prime die region and in between adjacent inter layer dielectric (ILD) levels of the upper ILD layer in the back end of line (BEOL) of the MRAM chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.