Method of wafer dicing
US10515853B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2018 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Dec 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/5446
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of wafer dicing is provided. The method of wafer dicing includes: providing a wafer, wherein the wafer includes a substrate, dies formed in and over the substrate and a scribe line structure located in a scribe line region between adjacent dies; removing a portion of the scribe line structure around a test device in the scribe line structure; attaching a front side of the wafer with a first tape; removing a portion of the substrate overlapping with the scribe line region from a back side of the wafer; attaching the back side of the wafer with a second tape; and removing the first tape along with the remaining portion of the scribe line structure attached thereon, leaving the dies separately attached on the second tape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.