Patent · US Active

Semiconductor package structure having a multi-thermal interface material structure

US10515869B1 · kind B1 · utility

1Cited by
23References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 29, 2018
Grant dateDec 24, 2019
Priority date—
Expiry dateMay 29, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3512
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.