Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structures
US10522679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2017 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Oct 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0172
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to semiconductor structures and, more particularly, to selective shallow trench isolation (STI) fill material for stress engineering in semiconductor structures and methods of manufacture. The structure includes a single diffusion break (SDB) region having at least one shallow trench isolation (STI) region with a stress fill material within a recess of the at least one STI region. The stress fill material imparts a stress on a gate structure adjacent to the at least one STI region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.