SiN selective etch to SiO2 with non-plasma dry process for 3D NAND device applications
US10529581B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for isotropic etching at least a portion of a silicon-containing layer on a sidewall of high-aspect-ratio (HAR) apertures formed on a substrate in a reaction chamber are disclosed. The HAR aperture formed by plasma etching a stack of alternating layers of a first silicon-containing layer and a second silicon-containing layer, the second silicon-containing layer is different from the first silicon-containing layer. The method comprising the steps of: a) introducing a fluorine containing etching gas selected from the group consisting of nitrosyl fluoride (FNO), trifluoroamine oxide (F3NO), nitryl fluoride (FNO2) and combinations thereof into the reaction chamber; and b) removing at least a portion of the second silicon-containing layers by selectively etching the second silicon-containing layers versus the first silicon-containing layers with the fluorine containing etching gas to produce recesses between the first silicon-containing layers on the sidewall of the HAR aperture. Alternatively, the disclosed etching processes are cyclic etching processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.