System and method to reduce pre-back-grinding process defects
US10534353B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2013 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Oct 3, 2033 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/005
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A system for reducing processing defects during processing of a semiconductor wafer prior to back-grinding the wafer includes a table having one or more holes formed therein, wherein the table comprises at least one of a chuck table or a support table, wherein the holes are perpendicular to the surface upon which a pre-back-grinding (PBG) process occurs. The system further includes one or more sensors disposed in said holes for monitoring a parameter during the PBG process. The system further includes a computer-implemented process control tool coupled with the one or more sensors and configured to determine whether the PBG process will continue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.