Patent · US Active

Electrostatic discharge devices with reduced capacitance

US10541236B2 · kind B2 · utility

0Cited by
0References
14Claims
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Assignee

Inventors

Key dates

Filing dateJun 26, 2018
Grant dateJan 21, 2020
Priority date
Expiry dateJun 26, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/62
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge structures with reduced capacitance and methods of manufacture. The structure includes: a plurality of fin structures provided in at least one N+ type region and at least one P+ region; and a plurality of gate structures disposed over the plurality of fin structures and within the at least one N+ type region and one P+ region, the plurality of gate structures being separated in a lengthwise direction between the at least one N+ type region and the least one P+ region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.