Read disturb scan consolidation
US10553290B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2018 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Oct 30, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing device in a memory system determines that a first read count of a first data block on a first plane of a memory component satisfies a first threshold criterion. The processing device further determines whether a second read count of a second data block on a second plane of the memory component satisfies a second threshold criterion, wherein the second block is associated with the first block, and wherein the second threshold criterion is lower than the first threshold criterion. Responsive to the second read count satisfying the second threshold criterion, the processing device performs a multi-plane scan to determine a first error rate for the first data block and a second error rate for the second data block in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.