Patent · US Active

Isolation of semiconductor device with buried cavity

US10553675B2 · kind B2 · utility

1Cited by

28References

8Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Sebastian Schmidt · Weisendorf, DE
Donald Dibra · Munich, DE
Oliver Hellmund · Straubing, DE
Peter Irsigler · Ried im Innkreis, AT
Andreas Meiser · Unterhaching, DE
Hans-Joachim Schulze · Taufkirchen, DE
Martina Seider-Schmidt · Munich, DE
Robert Wiesner · Chandler, US

Key dates

Filing date	Oct 17, 2017
Grant date	Feb 4, 2020
Priority date	—
Expiry date	Oct 17, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/02255
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In accordance with an embodiment of an integrated circuit, a cavity is buried in a semiconductor body below a first surface of the semiconductor body. An active area portion of the semiconductor body is arranged between the first surface and the cavity. The integrated circuit further includes a trench isolation structure configured to provide a lateral electric isolation of the active area portion.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.