Transistors with temperature compensating gate structures
US10553694B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2017 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Apr 11, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for forming semiconductor integrated circuits including a channel region, a gate dielectric between the gate electrode and the channel region, a first layer between the gate dielectric and the gate electrode, the first layer comprising temperature compensation material. In addition, the integrate circuit includes a source region adjacent to the channel region, a source metal contact on the source region, a drain region adjacent to the channel region, and a drain metal contact on the drain region. The temperature compensation material has a temperature dependent band structure, work-function, or polarization that dynamically adjusts the threshold voltage of the transistor in response to increased operating temperature to maintain the off-state current Ioff stable or otherwise within an acceptable tolerance. The temperature compensation material may be used in conjunction with a work function material to help provide desired performance at lower or non-elevated temperatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.