Utilizing overlay misregistration error estimations in imaging overlay metrology
US10565697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2017 |
| Grant date | Feb 18, 2020 |
| Priority date | — |
| Expiry date | Feb 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided, which calculate overlay misregistration error estimations from analyzed measurements of each ROI (region of interest) in at least one metrology imaging target, and incorporate the calculated overlay misregistration error estimations in a corresponding estimation of overlay misregistration. Disclosed embodiments provide a graduated and weighted analysis of target quality which may be integrated in a continuous manner into the metrology measurement processes, and moreover evaluates target quality in terms of overlay misregistration, which forms a common basis for evaluation of errors from different sources, such as characteristics of production steps, measurement parameters and target characteristics. Such common basis then enables any of combining various error sources to give a single number associated with measurement fidelity, analyzing various errors at wafer, lot and process levels, and/or to trade-off the resulting accuracy for throughput by reducing the number of measurements, in a controlled manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.