Magnetoresistive random access memory
US10566520B2 · kind B2 · utility
3Cited by
1References
17Claims
0Family size
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Key dates
| Filing date | Jul 8, 2018 |
| Grant date | Feb 18, 2020 |
| Priority date | — |
| Expiry date | Aug 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.