Method of reducing a sheet resistance in an electronic device, and an electronic device
US10573533B2 · kind B2 · utility
1Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2018 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Aug 29, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various embodiments provide a method of reducing a sheet resistance in an electronic device encapsulated at least partially in an encapsulation material, wherein the method comprises: providing an electronic device comprising a multilayer structure and being at least partially encapsulated by an encapsulation material; and locally introducing energy into the multilayer structure for reducing a sheet resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.