Low-cost semiconductor device manufacturing method
US10586863B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2017 |
| Grant date | Mar 10, 2020 |
| Priority date | — |
| Expiry date | May 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body regions in a semiconductor substrate, forming multiple gate insulating layers and multiple gate electrodes in the body region; implementing a blanket ion implantation in an entire surface of the substrate to form a low concentration doping region (LDD region) in the body region without a mask, forming a spacer at a side wall of the gate electrode, and implementing a high concentration ion implantation to form a high concentration source region and a high concentration drain region around the LDD region. According to the examples, devices have favorable electrical characteristics and at the same time, manufacturing costs are reduced. Since, when forming high concentration source region and drain regions, tilt and rotation co-implants are applied, an LDD masking step is potentially omitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.