Write assist
US10600474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2019 |
| Grant date | Mar 24, 2020 |
| Priority date | — |
| Expiry date | May 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1776
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit includes a core having a memory array. The memory array includes memory cells and bitlines, and is arranged in columns. The core includes a metallization layer having connections to the memory array, which is devoid of memory cells. Digit lines are connected to the bitlines of a column of the memory array. A write driver is connected to the digit lines. A write assist circuit is connected to the write driver. The write assist circuit maintains a voltage on the digit lines prior to write operations and provides a boost voltage to the digit lines during write operations. A wire bridge located in the metallization layer of the core connects the write assist circuit to the write driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.