Jet ablation die singulation systems and related methods
US10607889B1 · kind B1 · utility
6Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Sep 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68368
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Implementations of a method singulating a plurality of semiconductor die. Implementations may include: forming a pattern in a back metal layer coupled on a first side of a semiconductor substrate where the semiconductor substrate includes a plurality of semiconductor die. The method may include etching substantially through a thickness of the semiconductor substrate at the pattern in the back metal layer and jet ablating a layer of passivation material coupled to a second side of the semiconductor substrate to singulate the plurality of semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.