Patent · US Active

Semiconductor package having junction cooling pipes embedded in substrates

US10607919B2 · kind B2 · utility

1Cited by
5References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 25, 2017
Grant dateMar 31, 2020
Priority date
Expiry dateSep 25, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2225/1094
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.