Superjunction structure in a power semiconductor device
US10615040B2 · kind B2 · utility
2Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2017 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Aug 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26546
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of processing a power semiconductor device includes: providing a semiconductor body of the power semiconductor device; coupling a mask to the semiconductor body; and subjecting the semiconductor body to an ion implantation such that implantation ions traverse the mask prior to entering the semiconductor body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.