Patent · US Active

Facilitation of spin-coat planarization over feature topography during substrate fabrication

US10622267B2 · kind B2 · utility

2Cited by

4References

19Claims

0Family size

Assignee

TOKYO ELECTRON LIMITED · JP

Inventors

Ryan L. Burns · Pasadena, US
Benjamen M. Rathsack · Austin, US
Mark H. Somervell · Richardson, US
Makoto Muramatsu · Kochi, JP

Key dates

Filing date	Oct 4, 2017
Grant date	Apr 14, 2020
Priority date	—
Expiry date	Oct 4, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L22/12
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Described herein are technologies to facilitate device fabrication, especially those that involve spin-on coatings of a substrate (e.g., wafer). More particularly, technologies described herein facilitate the planarization (i.e., flatness) of spin-on coatings during the device fabrication to form a uniformly planar film or layer on the substrate. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.