Inventor · Austin, TX, US

Benjamen M. Rathsack

35Patents
9h-index
29Co-inventors
71Inventor score

Filing activity: Apr 21, 2005 → Jul 9, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US9613801B2 Integration of absorption based heating bake methods into a photolithography track system Electricity 448 Active
US9136110B2 Multi-step bake apparatus and method for directed self-assembly lithography control Electricity 61 Active
US8108805B2 Simplified micro-bridging and roughness analysis Electricity 30 Active
US7673278B2 Enhanced process yield using a hot-spot library Electricity 22 Active
US9349604B2 Use of topography to direct assembly of block copolymers in grapho-epitaxial applications Electricity 14 Active
US8288174B1 Electrostatic post exposure bake apparatus and method Electricity 12 Active
US9618848B2 Methods and techniques to use with photosensitized chemically amplified resist chemicals and processes Electricity 11 Active
US9519227B2 Metrology for measurement of photosensitizer concentration within photo-sensitized chemically-amplified resist (PS-CAR) Physics 10 Active
US9418860B2 Use of topography to direct assembly of block copolymers in grapho-epitaxial applications Electricity 10 Active
US9005877B2 Method of forming patterns using block copolymers and articles thereof Emerging Cross-Sectional Technologies 9 Active
US9412611B2 Use of grapho-epitaxial directed self-assembly to precisely cut lines Electricity 8 Active
US10020195B2 Chemical amplification methods and techniques for developable bottom anti-reflective coatings and dyed implant resists Electricity 7 Active
US8795952B2 Line pattern collapse mitigation through gap-fill material application Physics 6 Active
US9735026B2 Controlling cleaning of a layer on a substrate using nozzles Electricity 5 Active
US7930656B2 System and method for making photomasks Physics 4 Active
US8176443B2 Layout of printable assist features to aid transistor control Physics 4 Active
US8318607B2 Immersion lithography wafer edge bead removal for wafer and scanner defect prevention Electricity 4 Active
US7737016B2 Two-print two-etch method for enhancement of CD control using ghost poly Physics 4 Active
US9454081B2 Line pattern collapse mitigation through gap-fill material application Physics 3 Active
US9281251B2 Substrate backside texturing Electricity 2 Active
US9209014B2 Multi-step bake apparatus and method for directed self-assembly lithography control Electricity 2 Active
US9147574B2 Topography minimization of neutral layer overcoats in directed self-assembly applications Electricity 2 Active
US10622267B2 Facilitation of spin-coat planarization over feature topography during substrate fabrication Electricity 2 Active
US10429745B2 Photo-sensitized chemically amplified resist (PS-CAR) simulation Physics 2 Active
US7807343B2 EDA methodology for extending ghost feature beyond notched active to improve adjacent gate CD control using a two-print-two-etch approach Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.