Gate all-around semiconductor device including a first nanowire structure and a second nanowire structure

US10629501B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Gerben Doornbos · Kessel-Lo, BE
• Mark van Dal · Linden, BE
• Chung-Te Lin · Tainan, TW

Key dates

• Filing date: Dec 20, 2018
• Grant date: Apr 21, 2020
• Expiry date: Dec 20, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0177
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A semiconductor device includes first and second nanowire structures disposed on semiconductor substrate extending in first direction on substrate. First nanowire structure includes plurality of first nanowires including first nanowire material extending along first direction and arranged in second direction, second direction substantially perpendicular to first direction. Second nanowire structure includes plurality of second nanowires including second nanowire material extending along first direction arranged in second direction. Second nanowire material is not same as first nanowire material. Each nanowire is spaced-apart from immediately adjacent nanowire. First and second gate structures wrap around first and second nanowires at first region of respective first and second nanowire structures. First and second gate structures include gate electrodes. Viewed in cross section taken along third direction substantially perpendicular to first and second directions, height of first nanowires along second direction is not equal to distance of spacing along second direction between immediately adjacent second nanowires.