Semiconductor device and fabrication method thereof
US10629728B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2019 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Jan 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device including a substrate having a fin structure surrounded by a trench isolation region; a trench disposed in the fin structure; a silicon nitride trench-fill layer disposed in the trench; an interlayer dielectric layer disposed on the silicon nitride trench-fill layer; a working gate striding over the fin structure, on the first side of the trench; a dummy gate striding over the fin structure, on the second side of the trench; a doped source region in the fin structure; and a doped drain region in the fin structure. The dummy gate is disposed between the trench and the doped drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.