Gate all-around device
US10629752B1 · kind B1 · utility
0Cited by
24References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Oct 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Gate all-around devices are disclosed in which an angled channel including a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.