Skip via structures
US10636698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2019 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Mar 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to semiconductor structures and, more particularly, to skip via structures and methods of manufacture. The structure includes: a first wiring layer with one or more wiring structures; a second wiring layer with one or more wiring structures, located above the first wiring layer; a skip via with metallization, which passes through upper wiring levels including the second wiring layer and which makes contact with the one or more wiring structures of the first wiring layer; and a via structure which comprises a protective material and contacts at least one of the one or more wiring structures at the upper wiring level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.