Memory type which is cacheable yet inaccessible by speculative instructions
US10642744B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Jun 28, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/653
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved architectural means to address processor cache attacks based on speculative execution defines a new memory type that is both cacheable and inaccessible by speculation. Speculative execution cannot access and expose a memory location that is speculatively inaccessible. Such mechanisms can disqualify certain sensitive data from being exposed through speculative execution. Data which must be protected at a performance cost may be specifically marked. If the processor is told where secrets are stored in memory and is forbidden from speculating on those memory locations, then the processor will ensure the process trying to access those memory locations is privileged to access those locations before reading and caching them. Such countermeasure is effective against attacks that use speculative execution to leak secrets from a processor cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.