Performance optimized congruence class matching for multiple concurrent radix translations
US10649778B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2018 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Dec 4, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of optimized congruence class matching for concurrent memory translation requests to avoid memory access conflicts with respect to a virtual memory managed by a processor is provided. The method includes initiating a first table walk by a first memory access of the concurrent memory translation requests and pending a subsequent table walk initiated by a subsequent memory access of the concurrent memory translation requests. Then, the method determines whether the subsequent table walk will cause a memory access conflict with the first table walk based on the optimized congruence class matching. The subsequent memory access is rejected when the subsequent table walk will cause the memory access conflict with the first table walk.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.