Patent · US Active

Interposer with conductive routing exposed on sidewalls

US10651102B2 · kind B2 · utility

0Cited by

0References

11Claims

0Family size

Assignee

Intel IP Corporation · US

Inventors

Klaus Reingruber · Langquaid, DE
Christian Geissler · Teugn, DE
Georg Seidemann · Landshut, DE
Sonja Koller · Regensburg, DE

Key dates

Filing date	Dec 18, 2015
Grant date	May 12, 2020
Priority date	—
Expiry date	Dec 18, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2201/10378
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An electronic assembly that includes an electronic component; and an interposer that includes a body having upper and lower surfaces and side walls extending between the upper and lower surfaces, the interposer further including conductive routings that are exposed on at least one of the side walls, wherein the electronic component is connected directly to the interposer. The conductive routings are exposed on each side wall and on the upper and lower surfaces. The electronic assembly may further includes a substrate having a cavity such that the interposer is within the cavity, wherein the cavity includes sidewalls and substrate includes conductive traces that are exposed from the sidewalls of the cavity, wherein the conductive traces that are exposed from the sidewalls of the cavity are electrically connected directly to the conductive routings that are exposed on at least one of the side walls of the interposer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.