Patent · US Active

Three-dimensional ferroelectric NOR-type memory

US10651182B2 · kind B2 · utility

14Cited by
0References
22Claims
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Assignee

Inventors

Key dates

Filing dateSep 28, 2018
Grant dateMay 12, 2020
Priority date—
Expiry dateSep 28, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/689
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An embodiment includes a three dimensional (3D) memory that includes a NOR logic gate, wherein the NOR logic gate includes a ferroelectric based transistor. Other embodiments are addressed herein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.