Apparatuses including test segment circuits having latch circuits for testing a semiconductor die
US10663513B2 · kind B2 · utility
1Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 19, 2019 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | May 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/54
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Apparatuses including test segment circuits and methods for testing the same are disclosed. An example apparatus includes a plurality of segment lines configured to form a ring around a die and a plurality of test segment circuits, each test segment circuit coupled to at least two segment lines of the plurality of segment lines. Each test segment circuit is coupled to a portion of a first signal line, a portion of a second signal line, and a portion of a third signal line and each test segment circuit is configured to control an operation performed on at least one segment line of the plurality of segment lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.