Inventor · Boise, ID, US

Nathaniel J. Meier

47Patents
9h-index
28Co-inventors
67Inventor score

Filing activity: Jun 19, 2017 → Apr 3, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US10978132B2 Apparatuses and methods for staggered timing of skipped refresh operations Electricity 29 Active
US11069393B2 Apparatuses and methods for controlling steal rates Physics 28 Active
US11158364B2 Apparatuses and methods for tracking victim rows Physics 21 Active
US11200942B2 Apparatuses and methods for lossy row access counting Electricity 17 Active
US11227649B2 Apparatuses and methods for staggered timing of targeted refresh operations Physics 15 Active
US11302374B2 Apparatuses and methods for dynamic refresh allocation Physics 15 Active
US11309012B2 Apparatuses and methods for staggered timing of targeted refresh operations Physics 13 Active
US11417383B2 Apparatuses and methods for dynamic refresh allocation Physics 12 Active
US11087819B2 Methods for row hammer mitigation and memory devices and systems employing the same Physics 10 Active
US11610622B2 Apparatuses and methods for staggered timing of skipped refresh operations Electricity 8 Active
US10330726B2 Apparatuses including test segment circuits having latch circuits for testing a semiconductor die Physics 6 Active
US11030124B2 Semiconductor device with secure access key and associated methods and systems Electricity 6 Active
US11182308B2 Semiconductor device with secure access key and associated methods and systems Physics 6 Active
US11798610B2 Apparatuses and methods for controlling steal rates Physics 4 Active
US11984148B2 Apparatuses and methods for tracking victim rows Physics 4 Active
US11748276B2 Refresh and access modes for memory Physics 1 Active
US11132470B2 Semiconductor device with secure access key and associated methods and systems Physics 1 Active
US10824573B1 Refresh and access modes for memory Physics 1 Active
US10663513B2 Apparatuses including test segment circuits having latch circuits for testing a semiconductor die Physics 1 Active
US10990317B2 Memory with automatic background precondition upon powerup Physics 1 Active
US11520711B2 Semiconductor device with secure access key and associated methods and systems Electricity 1 Active
US11017834B2 Refresh command management Physics 0 Active
US12265630B2 Row access strobe (RAS) clobber and row hammer failures using a deterministic protocol Physics 0 Active
US12334138B2 Dynamic address scramble Physics 0 Active
US12056063B2 Refresh and access modes for memory Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.