Memory device with discharge voltage pulse to reduce injection type of program disturb
US10665306B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2019 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Apr 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for reducing an injection type of program disturb in a memory device. In one aspect, a discharge operation is performed at the start of a program loop. This operation discharges residue electrons from the channel region on the source side of the selected word line, WLn, to the channel region on the drain side of WLn. As a result, in a subsequent channel pre-charge operation, the residue electrons can be more easily removed from the channel. The discharge operation involves applying a voltage pulse to WLn and a first set of drain-side word lines which is adjacent to WLn. The remaining unselected word lines may be held at ground during the voltage pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.