Patent · US Active

High thermal release interposer

US10679919B2 · kind B2 · utility

1Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 25, 2018
Grant dateJun 9, 2020
Priority date—
Expiry dateJun 25, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit package having an interposer with increased thermal conductivity and techniques for fabricating such an integrated circuit package are provided. One example integrated circuit package generally includes a package substrate, at least one semiconductor die disposed above the package substrate, and an interposer disposed above the at least one semiconductor die. The interposer includes a dielectric layer, and a metallic plate disposed adjacent to a first portion of the dielectric layer. The height of the metallic plate is greater than a height of the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.