Patent · US Active

Functional testing of high-speed serial links

US10684930B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Martin Eckert · Metzingen, DE
Thomas Gentner · Eppelheim, DE
Marta Junginger · Altdorf, DE
Eckhard Kunigkeit · Stuttgart, DE
Matthias Pflanz · Schenefeld, DE
Quintino L. Trianni · Balingen, DE

Key dates

Filing date	Nov 30, 2017
Grant date	Jun 16, 2020
Priority date	—
Expiry date	Aug 4, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/273
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A functional testing high-speed serial link system includes a testing controller that generates a functional testing program, and a device under test (DUT) that receives the functional testing program. The DUT includes a first logic circuit array that generates first results in response to executing the functional test program. The system also includes a supporting chip that receives the functional testing program. The supporting chip includes a second logic circuit array that generates second results in response to executing the functional test program. A physical data link establishes signal communication between the DUT and the supporting chip. The testing controller diagnoses the physical link based on a comparison between expected diagnostic results associated with the functional testing program, and at least one of the first results and the second results.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.