Chip package assembly with modular core dice
US10692837B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2018 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | Jul 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package assembly and method for fabricating the same are provided which utilize at least one modular core dice to reduce the cost of manufacture. The modular core dice include at least two die disposed on a wafer segment that are separated by a scribe lane. In one example, a chip package assembly is provided that includes an interconnect substrate stacked below a first wafer segment. The first wafer segment has a first die spaced from a second die by a first scribe lane. The interconnect substrate has conductive routing that is electrically connected to the first die and the second die through die connections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.