Method of predicting patterning defects caused by overlay error
US10712672B2 · kind B2 · utility
6Cited by
1References
21Claims
0Family size
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Key dates
| Filing date | Jul 7, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Jul 7, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/7065
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method including determining a first color pattern and a second color pattern associated with a hot spot of a design layout pattern, the design layout pattern configured for transfer to a substrate, and predicting, by a hardware computer system, whether there would be a defect at the hot spot on the substrate caused by overlay error, based at least in part on a measurement of an overlay error between the first color pattern and the second color pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.