Patent · US Active

Semiconductor plug protected by protective dielectric layer in three-dimensional memory device and method for forming the same

US10714493B2 · kind B2 · utility

2Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 16, 2018
Grant dateJul 14, 2020
Priority date
Expiry dateDec 25, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D88/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.