Resistive memory array and fabricating method thereof
US10714535B2 · kind B2 · utility
0Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2018 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Dec 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming an insulator over a substrate. The insulator includes a first electrode, a second electrode, and a resistive element between the first electrode and the second electrode. The insulator is transformed into a resistor by applying a voltage to the insulator. The resistor is electrically connected to a transistor after transforming the insulator into the resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.