Semiconductor chip package having a cooling surface and method of manufacturing a semiconductor package

US10727151B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Liu Chen · Munich, DE
• Teck Sim Lee · Melaka City, MY
• Jia Yi Wong · Melaka City, MY
• Wei Han Koo · Melaka City, MY
• Thomas Stoeck · Buxtehude, DE
• Gilles Delarozee · Kleinmachnow, DE

Key dates

• Filing date: May 25, 2017
• Grant date: Jul 28, 2020
• Expiry date: May 25, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18161
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor chip package includes an electrically conducting carrier and a semiconductor chip disposed over the electrically conducting carrier. The semiconductor chip has a first surface facing the electrically conducting carrier and a second surface opposite the first surface. A metal plate has a first surface mechanically connected to the second surface of the semiconductor chip and a second surface opposite the first surface of the metal plate. The metal plate completely overlaps the second surface of the semiconductor chip. The second surface of the metal plate is at least partially exposed at a periphery of the semiconductor chip package.