Device, system and method to mitigate signal noise in communications with a memory module
US10729002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2019 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Jul 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10734
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.