Method and device for incorporating single diffusion break into nanochannel structures of FET devices
US10734224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2018 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Aug 16, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes providing a starting structure including a substrate having thereon a plurality of gate regions alternately arranged with a plurality of source/drain (S/D) regions, wherein each of the gate regions includes a nanochannel structure having an intermediate portion surrounded by a replacement gate, and opposing end portions surrounded by respective gate spacers such that the nanochannel structure extends through the replacement gate and the gate spacers of the gate region. Each of the S/D regions includes an S/D structure extending through the S/D region to connect nanochannel structures of first and second adjacent gate regions provided on opposing sides of the S/D region respectively. The first adjacent gate region is converted into a single diffusion break including a dummy gate structure, and the second adjacent gate region is converted into an active gate including an active gate structure configured to create a current channel within the nanochannel structure of the second adjacent gate region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.