Semiconductor package device with integrated antenna and manufacturing method thereof
US10734279B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Oct 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73267
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor package includes: coupling a semiconductor die to a protection layer; forming a first redistribution layer over the semiconductor die, wherein the first redistribution layer includes a first conductive plate and a first dielectric material laterally surrounding the first conductive plate; forming a recess in the first redistribution layer, wherein the recess is over the first conductive plate and defined by the first dielectric material; depositing an insulating film in the recess with a second dielectric material of a dielectric constant greater than a dielectric constant of the first dielectric material; and forming a second redistribution layer including a second conductive plate over the insulating film. The insulating film electrically isolates the first conductive plate from the second conductive plate, and one of the first conductive plate and the second conductive plate is configured to radiate or receive electromagnetic wave.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.