Fin end plug structures for advanced integrated circuit structure fabrication

US10734379B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Byron Ho · Hillsboro, US
• Chun-Kuo HUANG · Portland, US
• Erica J. Thompson · Beaverton, US
• Jeanne Luce · Hillsboro, US
• Michael L. Hattendorf · Beaverton, US
• Christopher P. Auth · Portland, US
• Ebony L. Mays · Hillsboro, US

Key dates

• Filing date: Dec 30, 2017
• Grant date: Aug 4, 2020
• Expiry date: Dec 30, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/853
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first isolation structure over a first end of a fin. A gate structure is over the fin and is spaced apart from the first isolation structure along the direction. A second isolation structure is over a second end of the fin, the second end opposite the first end. The second isolation structure is spaced apart from the gate structure. The first isolation structure and the second isolation structure both comprise a first dielectric material laterally surrounding a recessed second dielectric material distinct from the first dielectric material. The recessed second dielectric material laterally surrounds at least a portion of a third dielectric material different from the first and second dielectric materials.