Process for the manufacture of a recurrent neural network calculator
US10741757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Jun 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosed process includes the successive stages of providing a substrate comprising a dielectric layer; forming a first layer of block copolymers on a part of the dielectric layer, so that the dielectric layer exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the dielectric layer; removing the first layer of block copolymers; forming a first electrode on the structured dielectric layer; forming a memory layer, of resistive memory type, on the first electrode; forming a second electrode on the memory layer; forming a second layer of block copolymers on a part of the second electrode, so that the second electrode exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the second electrode; and removing the second layer of block copolymers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.